Dedicated Ph.D. Student in Electronics Engineering, specializing in VLSI circuit design at Incheon National University. A versatile academic background with Bachelor's and Master's degrees, supplemented by language proficiency attained at the institute. Fluent in Korean and English, with proficiency in Turkish. Ten years of residence in Korea as a Mongolian, showcasing adaptability and cultural understanding. Passionate about becoming an accomplished VLSI circuit designer, evidenced by relentless pursuit of expertise. Demonstrated resilience and work ethic by financing undergraduate studies through part-time employment. Currently focused on academic pursuits, including rigorous study and publication of scientific papers.
I'm a teaching assistant and researcher at the SVC Lab, focusing primarily on VLSI circuit research, particularly in memory circuitry. I also mentor new graduate students, providing training in essential research programs such as Matlab and Cadence Virtuoso, while assisting them in exploring their specialized fields. Additionally, I oversee the efficient operation of our server infrastructure.
I have authored several successful scientific papers, the majority of which have been published in leading journals within my field.
“A timing-based split-path sensing circuit for STT-MRAM,” MDPI Micromachines, vol. 13, no. 7, p. 1004, Jun. 2022. (SCIE)
“Spin-transfer-torque magnetic-tunnel-junction-based low-power nonvolatile flip-flop designs in the subthreshold voltage region,” IEEE Trans. Very Large Scale Integr. Syst. (TVLSI), vol. 31, no. 10, pp. 1565-1577, Oct. 2023. (SCIE)
“Offset-canceling current-latched sense amplifier with slow rise time control and reference voltage biasing techniques,” IEEE Trans. Circuits Syst. I, Reg. Papers (TCAS-I), vol. 70, no. 7, pp. 2689-2699, Jul. 2023.