I am currently conducting research on P-type oxide semiconductors (SnO, Te) used in thin film transistors. My focus is particularly on interface engineering to enhance device characteristics. I have extensive experience in setting up various semiconductor equipment and conducting research using numerous analytical tools.
Expertise in TFT Device Mechanics: Thorough understanding of Thin Film Transistor (TFT) operating mechanisms and capable of conducting research to enhance device performance
Proficient in Semiconductor Equipment Operation: Experienced with a wide range of tools including Atomic Layer Deposition (ALD), Sputtering, Photolithography, DC Analyzers, and more
Laboratory Leadership Experience: Served as the leader of the Semiconducting Thin-Film Engineering Lab, taking a leading role in lab setup and management
Technical Writing Abilities: Proficient in drafting patents and writing scholarly articles for publication
School adress : 4-219, 100, Inha-ro, Michuhol-gu, Incheon, Republic of Korea
Current Residence Address : Suite 201 97-1, Inha-ro, Michuhol-gu, Incheon, Republic of Korea
Registered Address : Unit 2303, Building 204, 17, Gobong-ro 278beon-gil, Ilsandong-gu, Goyang-si, Gyeonggi-do, Republic of Korea