Summary
Overview
Work History
Education
Skills
Timeline

Seungwon Roh

Design Verification Engineer
Anyang-si,41

Summary

Accomplished Design Verification Engineer at Samsung Electronics, skilled in functional coverage and UVM methodology. Enhanced verification efficiency through strategic test implementation and robust bug tracking processes. Proven ability to conduct root cause analysis and develop reusable test benches, demonstrating strong analytical and collaborative skills in high-pressure environments.

Overview

10
10
years of professional experience

Work History

Design Verification Engineer

Samsung Electronics
07.2018 - Current
  • Maximized functional coverage through strategic implementation of targeted tests and simulations, minimizing risks associated with undetected defects. (Black box verification with Verilog and SystemVerilog.)
  • Established consistent and effective bug tracking processes, enabling faster resolution of reported issues by collaborating closely with design teams.
  • Conducted root cause analysis for identified issues, providing detailed reports and recommendations for corrective action.
  • Identified bottlenecks in existing verification flows, leading to significant improvements in overall efficiency. (Usually uses Python scripts.)
  • Developed comprehensive test plans based on requirements analysis, ensuring thorough coverage of all critical aspects of design functionality. (Based on Spec.)
  • Created reusable test benches that reduced the effort required for future projects, improving overall efficiency. (UVM environment)
  • Experience in setting up the Dynamic POST Simulation verification environment by using the RCXT/Primetime tool for standard cell characterization and extracting SPF/SDF.

Panel Design Engineer

LG Display
07.2015 - 06.2018
  • Managed multiple projects simultaneously while adhering to strict deadlines and maintaining a high level of attention to detail. (LOT for engineering product)
  • Defective Analysis: FA/CA Work Execution.
  • Overseas business trip experience in Vietnam (performed defect analysis tasks).

Education

Bachelor of Science - Physics

Sogang Univ., Seoul
04.2001 -

Skills

Functional coverage

Timeline

Design Verification Engineer - Samsung Electronics
07.2018 - Current
Panel Design Engineer - LG Display
07.2015 - 06.2018
Sogang Univ. - Bachelor of Science, Physics
04.2001 -

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Seungwon RohDesign Verification Engineer