Yewon Cho
SRAM Circuit Design Engineer
100, Central Park-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do,41
Summary
Enthusiastic and conscientious undergraduate student pursuing a B.S. in Semiconductor Engineering. Eager to apply problem-solving skills developed through a Circuit Design Internship. Proficient in Verilog and VHDL, gained through hands-on coursework and active participation in club activities. A reliable and collaborative team player, experienced in managing group projects effectively. Organized, hardworking, and equipped with excellent interpersonal skills.
Overview
1
1
year of professional experience
Work History
Circuit Design Intern
Samsung Semiconductor Inc.
01.2025 - 06.2025
- Collaborated with the design team for successful project completion within deadlines.
- Helped maintain organized archives of design assets for efficient retrieval when needed.
- Conducted competitor analysis to identify industry trends and best practices for use in future projects.
Undergraduate Research Intern
IDEA Lab
06.2024 - 12.2024
- Completed research, compiled data, and assisted in timely reporting regarding cache design and architecture.
- Worked closely with faculty mentors to refine hypotheses, troubleshoot issues, and optimize protocols.
- Gained hands-on experience with cutting-edge laboratory equipment and techniques to enhance experimental outcomes.
Education
Bachelor of Science - Semiconductor Systems Engineering
Sungkyunkwan University
Suwon 04.2001 -
Skills
Verilog and VHDL
Activities
- Member of Sungkyunkwan Digital System Club(2024 - 2026): academical club focused on designing and verifying RTL using Verilog.
References
"References available upon request"
Timeline
Circuit Design Intern
Samsung Semiconductor Inc.
01.2025 - 06.2025
Undergraduate Research Intern
IDEA Lab
06.2024 - 12.2024
Bachelor of Science - Semiconductor Systems Engineering
Sungkyunkwan University
04.2001 -
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