Sang-Hyun Lee
Analog Circuit Engineer
Gyeonggi-do
Summary
Master’s student at Sungkyunkwan University specializing in analog/RF circuit design, with practical experience in low-power communication systems such as BLE-based backscatter circuits. Skilled in Cadence Virtuoso for simulation and layout, with a strong focus on problem-solving and cross-functional collaboration. Eager to apply technical expertise and communication skills as a Field Application Engineer to deliver customer-driven solutions in analog and RF applications.
Overview
2
2
years of professional experience
1
1
Language
Work History
Researcher at the Integrated Circuit Laboratory
Sungkyunkwan University
03.2023 - 08.2025
Worked on analog and RF circuit design projects in the Integrated Circuit Laboratory, focusing on low-power communication systems. Gained hands-on experience with MPW tape-out processes, circuit simulation, layout design, and measurement. Familiar with EDA tools under various licenses (Cadence Virtuoso, EMX, ADS, etc.), and capable of handling the full flow from schematic to silicon.
Education
Bachelor's Degree - Physics and Semiconductor Science
Dongguk University
Seoul, South Korea03-2023
Master's Degree - Electrical Engineering
Sungkyunkwan University
Suwon 04.2001 -
Skills
- Designed analog integrated circuits using Cadence Virtuoso platform
- Centos 79 Linux Server / Ubuntu
- IC Compiler Based PNR
- Verilog
- PSPICE, SMARTSPICE
- Measurement Tool
Official Test Scores
- TOEIC: 910/990
- OPIC: IM3
Academic Activities, Research Experience, Awards and Honors
- Attended the Korean Conference on Semiconductor Engineering (2023)
- Differential Coplitts Structure VCO Poster Section
- Participated in the IDEC Chip Design Contest (2023)
- Dual-mode wireless charging system with RF energy harvesting Poster Section
- Presented at the International Conference on Electronics, Information, and Communication (ICEIC 2024)
- A Fully Integrated Single Sideband Backscatter Uplink for the BLE Application Poster Section
- Involved in full chip design and tape-out process
- Attended the Fall Conference of the Institute of Electronics Engineers of Korea (IEEK 2024)
- BLE 애플리케이션을 위한 Fully-Integrated Single Sideband Backscatter Uplink Poster Section
- Completed Chip Tape-Out through IDEC using Samsung 28nm FD-SOI Process
- 3-Level Fully-Integrated Voltage Regulator (F-IVR)
- Designed and Taped-Out a Precision Instrumentation Amplifier for EEG/ECG Applications
- Completed Multiple Analog IC Design Training Courses Provided by IDEC
- Built and Managed Laboratory Server Based on CentOS 7.9 Workstation
- Managed EDA Tool Licenses including Cadence and Synopsys Suites
Timeline
Researcher at the Integrated Circuit Laboratory
Sungkyunkwan University
03.2023 - 08.2025
Master's Degree - Electrical Engineering
Sungkyunkwan University
04.2001 -
Bachelor's Degree - Physics and Semiconductor Science
Dongguk University
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